1. Technical Field
A semiconductor device, a method for testing the same and a test system are disclosed that are capable of reducing the number of probing pads used during a wafer test.
2. Discussion of Related Art
Generally, integrated circuits of a semiconductor device are formed on a semiconductor wafer in the form of a die and then packaged. In order to avoid packaging defective integrated circuits, it is preferred to test the integrated circuits on each wafer. The testing of the integrated circuits include a series of transmitting a test signal to an input terminal, and then monitoring an output signal generated by the integrated circuit and outputted through an output terminal in order to decide whether the integrated circuit operates as expected.
A typical integrated circuit test system includes ‘a test head’ having a circuit board for implementing a set of test channels. Each of the test channels includes the input channel for providing the test signal to the input terminal of the integrated circuit and the output channel for receiving the output signal outputting from the output terminal of the integrated circuit. A pad is formed in the integrated circuit so that the pad is interconnected to the test channel through a contact needle of the probe card. In other words, an input/output of the test signal is accomplished between the integrated circuit and the test channel through the pad.
In general, a single test channel is interconnected through a single pad and a contact chip of the probe card. Further, the number of the test channels in view of technical limitations of the test system is smaller than the number of pads of the integrated circuit. That is, the number of pads on the wafer equals the number of pads on the die times the number of dies on the wafer. Accordingly, the number of pads by far surpasses the number of test channels of the test system. Therefore, a lot of time is needed to test all of the integrated circuits on the wafer using a single test system.